Rate the Article: Implementation of Space Time Block Codes for Wimax Applications, IJSR, Call for Papers, Online Journal
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064

Downloads: 128 | Views: 467 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1

Research Paper | Electronics & Communication Engineering | India | Volume 2 Issue 3, March 2013 | Rating: 6.4 / 10


Implementation of Space Time Block Codes for Wimax Applications

M Ravi, A Madhusudhan


Abstract: This paper describes the concept, architecture, development and demonstration of a real time, maximum likelihood Alamouti decoder for a wireless 4-transmit 4-receiver multiple input and multiple output (MIMO) Smart Antenna Software Radio Test System (SASRATS) platform. It is implemented on a Xilinx Vertex 2 Pro Field Programmable Gate Array (FPGA). Hardware, firmware, use of the Xilinx Core Generator Intellectual Property modules and experimental verification of the decoder are discussed.


Keywords: real-time implementation, Alamouti, FPGA, maximum likelihood decoder, MIMO


Edition: Volume 2 Issue 3, March 2013,


Pages: 52 - 56



Rate this Article


Select Rating (Lowest: 1, Highest: 10)

5

Your Comments (Only high quality comments will be accepted.)

Characters: 0

Your Full Name:


Your Valid Email Address:


Verification Code will appear in 2 Seconds ... Wait

Top