Rate the Article: Robust Decoder Hardware System Improvements for Tuned Predictions, IJSR, Call for Papers, Online Journal
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064

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Case Studies | Electronics & Communication Engineering | United States of America | Volume 13 Issue 10, October 2024 | Rating: 4.8 / 10


Robust Decoder Hardware System Improvements for Tuned Predictions

Apoorva Reddy Proddutoori


Abstract: To deliver UHD video services on portable devices with limited battery power, it's crucial to develop multi-core-based, dedicated HEVC hardware decoders that support tile- and wavefront-based parallel processing. This approach divides each frame into multiple picture partitions, which can then be processed simultaneously by multiple hardware decoder cores. However, parallelizing in-loop filtering (ILF) at tile boundaries proves challenging for multi-core HEVC hardware decoders due to the data dependency between samples across different tiles. Distributed Video Coding (DVC) shifts the computational complexity of traditional video coding from the encoder to the decoder, aiming to address the complex nature of the mode decision (MD) algorithm in H.264/AVC video coding. The goal was to transfer the MD algorithm from the encoder to the decoder. In this review, we present a proficient control technique for ILF across tile limits in multi-center HEVC equipment decoders. A decoder core can continue processing the subsequent coding tree unit (CTU) without waiting for other decoders to finish their ILF processing for neighboring CTUs in other tiles thanks to our approach, which eliminates the need for additional in-loop filters for ILF across tile boundaries.


Keywords: Decoder, H.265/HEVC, H.264/AVC, In Loop Filtering, 4k30 UHD, multi-core


Edition: Volume 13 Issue 10, October 2024,


Pages: 1755 - 1757



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