Downloads: 127 | Views: 311
Research Paper | Electronics & Communication Engineering | India | Volume 3 Issue 7, July 2014 | Popularity: 6.6 / 10
Design of Modified Parallel Prefix Knowles Adder
Pawan Kumar, Jasbir Kaur
Abstract: Parallel Prefix Adders plays a prominent role in Digital Combinational Circuits. The basic function of adder in ALU is addition that is also used in Multipliers which results in decrease or increase of Delay that depends on the architecture of adder. Area and power are another important factors which really makes the adder effective The high performance digital adders with reduced area and low power consumption is an important design constraint for modern advanced processors. So, low power adders are also a need for todays VLSI industry. This Paper discusses the design of novel design of 16 bit Parallel Prefix adder. This adder is a mixture of two types of adders i. e Brent Kung and Knowles adder. At last there is comparison of 8 and 16 bit Knowles, 8 and 16 bit Modified knowles adder that is our Proposed design our design shows better performance from that of parallel prefix knowles and kogge stone adder in terms of power, area and Combinational path delay.
Keywords: Modified Knowles adder, carry look ahead adder, Knowles adder, Parallel Prefix adder
Edition: Volume 3 Issue 7, July 2014
Pages: 199 - 201
Make Sure to Disable the Pop-Up Blocker of Web Browser
Similar Articles
Downloads: 109
Research Paper, Electronics & Communication Engineering, India, Volume 6 Issue 6, June 2017
Pages: 2826 - 2832ASIC Implementation and Comparison of Diminished-one Modulo 2n+1 Adder
Raj Kishore Kumar, Vikram Kumar
Downloads: 110
Survey Paper, Electronics & Communication Engineering, India, Volume 3 Issue 6, June 2014
Pages: 2339 - 2342Delay Analysis of Parallel-Prefix Adders
Geeta Rani, Sachin Kumar
Downloads: 110
Research Paper, Electronics & Communication Engineering, India, Volume 4 Issue 8, August 2015
Pages: 2029 - 2034An Enhanced Residue Modular Multiplier for Cryptography
Vundela Sarada
Downloads: 117 | Weekly Hits: ⮙1 | Monthly Hits: ⮙1
Case Studies, Electronics & Communication Engineering, India, Volume 4 Issue 2, February 2015
Pages: 1729 - 1733Modified Reverse Converter in Residue Number System via Specific Hybrid Parallel Prefix Adders
Surumi.S, Sukanya Sundaresh
Downloads: 119
Comparative Studies, Electronics & Communication Engineering, India, Volume 5 Issue 5, May 2016
Pages: 1292 - 1295Comparison of Various Adder Designs in terms of Delay and Area
Khushboo Bais, Zoonubiya Ali