Implementation of Adaptive Viterbi Decoder for Wireless Communication
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


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Research Paper | Electronics & Communication Engineering | India | Volume 2 Issue 3, March 2013 | Popularity: 6.4 / 10


     

Implementation of Adaptive Viterbi Decoder for Wireless Communication

Rupali Dhobale, Kalyani Ghate, Nikhil Pimpalgaonkar, R. B. Khule


Abstract: Viterbi algorithm is employed in wireless communication to decode the Convolution codes; those codes are used in every robust digital communication systems. Such decoders are complex & dissipate large amount of power. Thus the paper presents the design of an Adaptive Viterbi Decoder (AVD) that uses survivor path with parameters for wireless communication in an attempt to reduce the power and cost and at the same time increase in speed. Most of the researches work to reduce power consumption, or work with high frequency for using the decoder in the modern applications such as 3 GPP, DVB, and wireless communications. Field Programmable Gate Array technology (FPGA) is considered a highly configurable option for implementing many sophisticated signal processing tasks. The proposed decoder design is simulated on ModelsimSE6.3f and implemented using VHDL code.


Keywords: Viterbi Algorithm, Adaptive Viterbi Decoder, Field Programmable Gate Array, VHDL, ASIC


Edition: Volume 2 Issue 3, March 2013


Pages: 24 - 28



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Rupali Dhobale, Kalyani Ghate, Nikhil Pimpalgaonkar, R. B. Khule, "Implementation of Adaptive Viterbi Decoder for Wireless Communication", International Journal of Science and Research (IJSR), Volume 2 Issue 3, March 2013, pp. 24-28, https://www.ijsr.net/getabstract.php?paperid=IJSRON2013514, DOI: https://www.doi.org/10.21275/IJSRON2013514

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