International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


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Student Project | Electronics & Communication Engineering | India | Volume 12 Issue 9, September 2023 | Popularity: 4.6 / 10


     

Design of Low-Cost Stochastic Number Generator Using TSPC Logic in 45nm Technology

Pavan PH, Lalitha S


Abstract: An essential part of stochastic computing (SC) is the stochastic number generator (SNG). The SNG has an ability to change the binary numbers into stochastic bit streams. An SNG includes random number source (RNS) i.e., LFSR and a comparator. LFSR generates random bit sequences based on the tapings made in it. Using simulation outcomes, it describes how the weighted binary generator (WBG) which can be used to replace the comparator (CMP) component of SNG circuits to reduce SC correlation. The probability conversion circuit (PCC) is another name for WBG. The PCC converts the generated random numbers into a random bit stream, which has the desired chance of generating 1s. This project presents a comparative approach towards designing SNG in different logics in 45nm technology. Different logics are CMOS and TSPC. SNG is designed for every logic mentioned above. By comparing parameters like Area, Power consumption, Number of transistors used, working frequency, and concluding which logic based SNG is better.


Keywords: Linear feedback shift register, Stochastic number generator, weighted binary generator, Random number source


Edition: Volume 12 Issue 9, September 2023


Pages: 1388 - 1394


DOI: https://www.doi.org/10.21275/SR23916161201



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Pavan PH, Lalitha S, "Design of Low-Cost Stochastic Number Generator Using TSPC Logic in 45nm Technology", International Journal of Science and Research (IJSR), Volume 12 Issue 9, September 2023, pp. 1388-1394, https://www.ijsr.net/getabstract.php?paperid=SR23916161201, DOI: https://www.doi.org/10.21275/SR23916161201



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