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Analysis Study Research Paper | Electrical & Electronics Engineering | India | Volume 10 Issue 2, February 2021 | Popularity: 4.8 / 10
New Feature Verification Simplified with Automated Verification Component Build, Centralized Test Plan and Guidelines for DUT Boundaries and Integration Strategies
Ankit Chandankhede
Abstract: Modern applications demand newer architectures and enhanced feature to process tasks at high speed. Such architectural changes or newer mega features necessitates modification to existing architecture or completely newer architecture and often affects different design units of the architectures. Monumental changes across the architecture introduces numerous controls, finite state machine, newer pipeline, data paths and configurations. These heavy changes are highly prone to architectural gaps and design bugs. Thus, different pre silicon verification strategies are absolute to meet essential to not only meet the high functional quality of design as well as performance. Verification of new mega features faces numerous challenges such as comprehensive testplanning, bringing up of these new features and executions of test plan. Addressing these challenges is critical to flawless execution to achieve high quality of design for A0 production and meet the timelines to market. This paper proposes an alternative approach to existing pre - silicon verification of mega new features such as multi - context, ray tracing and multiple compute pipeline in addition to existing compute and 3D shading pipelines of graphics architecture [1]. Our novel approach provides improvements in every step of the pre - silicon verification stages including test planning, feature integration, bring up, building for API, test constraint for building basic testcases and protocol related coverages based on the protocol definitions of packet information to finding bugs in early stages of design such as interoperability and exposing architectural gaps. This paper details challenges in verification of process and precise steps to overcome these challenges using automating scripts, regression management and effective debugging strategies.
Keywords: presilicon verification, architecture changes, feature integration, design challenges, debugging strategies
Edition: Volume 10 Issue 2, February 2021
Pages: 1762 - 1765