Design and Implementation of Low Power 32 bit Reversible Carry Skip Adder
International Journal of Science and Research (IJSR)

International Journal of Science and Research (IJSR)
Call for Papers | Fully Refereed | Open Access | Double Blind Peer Reviewed

ISSN: 2319-7064


Downloads: 149 | Views: 374

Research Paper | Electronics & Communication Engineering | India | Volume 4 Issue 7, July 2015 | Popularity: 6.3 / 10


     

Design and Implementation of Low Power 32 bit Reversible Carry Skip Adder

Rewati D. Gatfane, Manisha Waje


Abstract: In emerging nanotechnology, new reversible logic appears to be promising due to its wide application in emerging technologies. Reversible logic has many other applications on quantum computing, DNA computing, molecular computing, optical computing, quantum dot cellular automata, DSP application etc. In this paper, low power 32 bit Carry Skip Adder is proposed using reversible logic to reduce the transistor overhead. MTSG gate, Toffoli gate, Fredkin gate is used to design proposed the carry skip adder. The structural functionality of the 32 bit carry skip adder is verified using Digital Schematic Editor and Simulation, Microwind software. After comparing the performance analysis of 32 bit CSA using MTSG gate is efficient than other carry skip adder.


Keywords: reversible logic, reversible basis gates, garbage output, quantum computing, carry skip adder


Edition: Volume 4 Issue 7, July 2015


Pages: 67 - 70



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Rewati D. Gatfane, Manisha Waje, "Design and Implementation of Low Power 32 bit Reversible Carry Skip Adder", International Journal of Science and Research (IJSR), Volume 4 Issue 7, July 2015, pp. 67-70, https://www.ijsr.net/getabstract.php?paperid=SUB156246, DOI: https://www.doi.org/10.21275/SUB156246

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